Ameer Haj Ali

Ameer Haj Ali is a Ph.D. candidate in the ADEPT Lab and RISE Lab at UC Berkeley, advised by Professors Ion Stoica and Krste Asanovic. His current research is focused on Compiling, Auto-Tuning, Code Optimization, Machine Learning, Reinforcement Learning, and hardware for machine learning. At UC Berkeley Ameer helped bring up/led many projects spanning machine learning in compiler optimization and hardware software codesign. This includes Gemmini, AutoPhase, NeuroVectorizer, ProTuner, Ansor, AutoCkt and more. Ameer finished his M.Sc. studies (summa cum laude, the valedictorian) at the Technion in 2018, where he worked on using emerging memory technologies to enhance the performance of modern computer systems with Professor Shahar Kvatinsky and made multiple journal and conference publications. He also finished four years of undergraduate studies in computer engineering at the Technion in only three years, graduating summa cum laude and receiving the valedictorian honor. In Summer 2020, Ameer is working at Anyscale, Inc, where he leads the on premise cluster management. During Summer 2019, Ameer worked as a research scientist at Intel Labs in the brain inspired computing lab where he explored deep reinforcement learning in system optimization, and built NeuroVectorizer and RLDRM. During his undergraduate studies, Ameer worked at Mellanox Technologies as a chip designer, focusing on creating design and automation tools that facilitated the formal and dynamic verification process.

In his free time, Ameer works as a consultant at AnyScale, Inc, volunteers as a board member on the board of directors of American Technion Society (ATS), and promotes the underprivileged Arab minority in Israel.

Contact

Education

  • University of California, Berkeley, ​2018 - 2020

Ph.D. student, working with Prof. Krste Asanovic and Prof. Ion Stoica.

Finished 5-year track summa cum laude in two years.

Research Interests: Compiling, Auto-Tuning, Code Optimization, Machine Learning, Reinforcement Learning, and hardware for machine learning.

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M.Sc., Electrical Engineering.

Finished 4-year track summa cum laude (top 3%) in three years.

Member of the President’s List of highest honors for excellent scholastic achievements every semester.


B.Sc., Computer Engineering.

Finished 4-year track summa cum laude (top 3%) in three years.

Member of the President’s List of highest honors for excellent scholastic achievements every semester.

Professional Experience

Industry


    • Software Engineer, AnyScale, USA, 2019 - present

- Implemented scalable Scikit-learn on top of Ray that runs on large clusters.

- Lead the implementation of C++ client API for Ray.

- Built a cloud gateway that enables plugging any type of remote clusters including on-prem.

- Contributed to RLlib: scalable reinforcement learning library.


    • Board Member, American Technion Society, USA, 2019 - present

    • AI Research Intern, Intel Labs (Brain Inspired Computing Lab), USA, Summer 2019

- NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning.

- A View on Deep Reinforcement Learning in System Optimization.

- RLDRM: Closed Loop Dynamic Intel RDT Resource Allocation with Deep Reinforcement Learning.

        • Published in NetSoft 2020 (received Best Paper Award).


    • Chip Designer, Mellanox Technologies (R&D), Yokneam, 2015 - 2016

- Worked on creating design and automation tools that facilitated the formal and dynamic verification process. Worked especially with Python, scripting languages, C++, and Verilog.

Graduate Teaching Assistance

University of California, Berkeley, ​2019 - present

        • Graduate Student Instructor (GSI), Introduction to Machine Learning (CS 189/289A).

Technion, 2015 - 2018

        • Head Teaching Assistant, Circuit Theory (044105).

        • Head Teaching Assistant, Electronic Switching Circuits (044147).

        • Supervisor of B.Sc. projects, VLSI Lab and Parallel Systems Lab (044167).

        • Teaching Assistant, MATLAB.

Awards and Fellowships

  • The Valedictorian Honor (M.Sc.), Technion, 2019.

  • Open Gateway Fellowship, UC Berkeley, 2018.

  • The William Oldham Fellowship, UC Berkeley, 2018.

  • The Valedictorian Honor (B.Sc.), Technion, 2017.

  • Dean’s scholarship for excellent graduate students, Technion, 2016.

  • Full tuition scholarship for M.Sc. studies, Technion , 2016-2018.

  • The System Architecture Labs Cluster Prize for outstanding undergraduate projects (received twice), Technion, 2016.

  • Excellence award from Apple for excellent scholastic achievements, Technion, 2016.

  • Member of the President’s List of highest honors for excellent scholastic achievements in all undergraduate semesters (top 3%), Technion, 2013-2016.

  • Full tuition scholarship for B.Sc. studies, Technion, 2013-2016.

Advised Students

University of California, Berkeley

  • Chloe Liu (current).

  • Jason Kang (current).

  • Linyue Song (current)

  • Abdallah Elidrissi (Current)

  • Ian Galbraith (First employment: software engineer at Twilio)

  • Fang Shuo Deng (First employment: software engineer at Abnormal Security)

Israel Institute of Technology, Technion

Publications

  • ProTuner: Tuning Programs with Monte Carlo Tree Search

Ameer Haj-Ali, Hasan Genc, Qijing Huang, William Moses, John Wawrzynek, Krste Asanović, Ion Stoica.

arXiv preprint, 2020. [paper]

  • Ansor: Generating High-Performance Tensor Programs for Deep Learning

Lianmin Zheng, Chengfan Jia, Minmin Sun, Zhao Wu, Cody Hao Yu, Ameer Haj-Ali, Yida Wang, Jun Yang, Danyang Zhuo, Koushik Sen, Joseph Gonzalez, Ion Stoica.

The 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI), 2020. [paper]


  • NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. Work done in a summer internship at Intel Labs.

Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Sophia Shao, Krste Asanovic, Ion Stoica.

International Symposium on Code Generation and Optimization (CGO), 2020. [paper][code][video]


  • AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning.

Ameer Haj-Ali*, Qijing Huang*, William Moses, John Xiang, Krste Asanovic , John Wawrzynek, Ion Stoica.

Proceedings of Machine Learning and Systems (MLSys), 2020. [paper][code][video]


  • AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs.

Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Suhong Moon, Kourosh Hakhamaneshi, Ion Stoica, Krste Asanovic, Borivoje Nikolic.

Design Automation and Test in Europe (DATE), 2020. [paper][code]


  • RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization. Work done in a summer internship at Intel Labs. Best Paper Award.

Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic.

IEEE Conference on Network Softwarization (NetSoft), 2020. [paper][code]


  • A View on Deep Reinforcement Learning in System Optimization. Work done in a summer internship at Intel Labs.

Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Joseph Gonzalez, Krste Asanovic, Ion Stoica.

arXiv preprint, 2019. [paper]


  • Learning to Vectorize Using Deep Reinforcement Learning. Work done in a summer internship at Intel Labs.

Ameer Haj-Ali, Nesreen Ahmed, Ted Willke, Sophia Shao, Krste Asanovic, Ion Stoica.

Workshop on ML for Systems at NeurIPS, 2019. [paper][code]


  • Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep Learning Architectures.

Ameer Haj-Ali*, Hasan Genc*, Vighnesh Iyer*, Alon Amid*, Howard Mao, John Wright, Colin Schmidt, Jerry Zhao, Albert Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic.

arXiv preprint, 2019. [paper][code]


  • AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.

Ameer Haj-Ali*, Qijing Huang*, William Moses, John Xiang, Ion Stoica, Krste Asanovic , John Wawrzynek.

FCCM, 2019. [paper][code][video]


  • Performing Image Processing in Memristive Memory. Nominated for Cadence Academic Master Thesis Award.

Ameer Haj-Ali.

M.Sc. Thesis. [thesis]


  • Memristor-Based Processing-in-Memory and Its Application On Image Processing.

Ameer Haj-Ali, Ronny Ronen, Rotem Ben-Hur, Nimrod Wald, and Shahar Kvatinsky.

Elsevier, 2020. [chapter]


  • mMPU - a Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck.

Nishil Talati, Rotem Ben-Hur, Nimrod Wald, Ameer Haj-Ali, John Reuben, and Shahar Kvatinsky.

Springer, 2020. [chapter]


  • SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.

Rotem Ben-hur, Ronny Ronen, Ameer Haj-Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, and Shahar Kvatinsky.

TCAD, 2019. [paper]


  • Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse.

Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj-Ali, and Shahar Kvatinsky.

TCAS-I, 2019. [paper]


  • Not in Name Alone: a Memristive Memory Processing Unit for Real In-Memory Processing.

Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, and Shahar Kvatinsky.

IEEE Micro, 2018. [paper]


  • IMAGING: In-Memory AlGorithms for Image processiNG.

Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, and Shahar Kvatinsky.

TCAS-I, 2018. [paper]


  • Efficient Algorithms for In-memory Fixed Point Multiplication Using MAGIC.

Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, and Shahar Kvatinsky.

ISCAS, 2018. [paper]


  • Practical Challenges in Delivering the Promises of Real Processing-in-Memory Machines.

Nishil Talati, Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, Pierre-Emmanuel Gaillardon, and Shahar Kvatinsky.

DATE, 2018. [paper]


  • Memristive Logic: A Framework for Evaluation and Comparison.

John Reuben, Rotem Ben-Hur, Nimrod Wald, Nishil Talati, Ameer Haj-Ali, Pierre-mmanuel Gaillardon, and Shahar Kvatinsky.

PATMOS, 2017. [paper]


  • A Taxonomy and Evaluation Framework for Memristive Logic.

John Reuben, Rotem Ben-Hur, Nimrod Wald, Nishil Talati, Ameer Haj-Ali, Pierre-Emmanuel Gaillardon, and Shahar Kvatinsky.

Springer, 2017. [chapter]